Vlsi HEADSPEAKER - 5.1 Spezifikationen

VLSISolutionyVS1053bVS1053BVS1053b -Ogg Vorbis/MP3/AAC/WMA/MIDIAUDIO CODECFeatures• Decodes Ogg Vorbis;MPEG 1 & 2 audio layer III (CBR +VBR+ABR);

VLSISolutionyVS1053bVS1053B4. CHARACTERISTICS & SPECIFICATIONS4 Characteristics & Specifications4.1 Absolute Maximum RatingsParameter Symbol Mi

VLSISolutionyVS1053bVS1053B4. CHARACTERISTICS & SPECIFICATIONS4.3 Analog CharacteristicsUnless otherwise noted: AVDD=3.3V, CVDD=1.8V, IOVDD=2.8V,

VLSISolutionyVS1053bVS1053B4. CHARACTERISTICS & SPECIFICATIONS4.4 Power ConsumptionTested with an MPEG 1.0 Layer-3 128 kbps sample and generated s

VLSISolutionyVS1053bVS1053B5. PACKAGES AND PIN DESCRIPTIONS5 Packages and Pin Descriptions5.1 PackagesLPQFP-48 is a lead (Pb) free and also RoHS compl

VLSISolutionyVS1053bVS1053B5. PACKAGES AND PIN DESCRIPTIONSPad Name LQFPPinPinTypeFunctionMICP / LINE1 1 AI Positive differential mic input, self-bias

VLSISolutionyVS1053bVS1053B5. PACKAGES AND PIN DESCRIPTIONSPin types:Type DescriptionDI Digital input, CMOS Input PadDO Digital output, CMOS Input Pad

VLSISolutionyVS1053bVS1053B6. CONNECTION DIAGRAM, LQFP-486 Connection Diagram, LQFP-48Figure 3: Typical Connection Diagram Using LQFP-48.Figure 3 show

VLSISolutionyVS1053bVS1053B6. CONNECTION DIAGRAM, LQFP-48The common buffer GBUF can be used for common voltage (1.23 V) for earphones. This will elimi

VLSISolutionyVS1053bVS1053B7. SPI BUSES7 SPI Buses7.1 GeneralThe SPI Bus - that was originally used in some Motorola devices - has been used for both

VLSISolutionyVS1053bVS1053B7. SPI BUSES7.3 Data Request Pin DREQThe DREQ pin/signal is used to signal if VS1053b’s 2048-byte FIFO is capable of receiv

VLSISolutionyVS1053bVS1053BCONTENTSContents1 Licenses 92 Disclaimer 93 Definitions 94 Characteristics & Specifications 104.1 Absolute Maximum Rating

VLSISolutionyVS1053bVS1053B7. SPI BUSES7.4.3 SDI in VS1001 Compatibility Mode (deprecated)BSYNCSDATADCLKD7 D6 D5 D4 D3 D2 D1 D0Figure 4: BSYNC Signal

VLSISolutionyVS1053bVS1053B7. SPI BUSES7.5.2 SCI Read0 1 2 3 4 5 6 7 8 9 10 11 12 13 30 3114 15 16 170 0 0 0 0 0 1 1 0 0 0 03 2 1 00 0 0 0 0 0 0 0 0 0

VLSISolutionyVS1053bVS1053B7. SPI BUSESAfter the word has been shifted in and the last clock has been sent, XCS should be pulled high to end theWRITE

VLSISolutionyVS1053bVS1053B7. SPI BUSES7.6 SPI Timing DiagramXCSSCKSISO0 1 1514 16tXCSStXCSHtWL tWHtHtSUtVtZtDIStXCS3031Figure 9: SPI Timing Diagram.S

VLSISolutionyVS1053bVS1053B7. SPI BUSES7.7 SPI Examples with SM SDINEW and SM SDISHARED set7.7.1 Two SCI Writes01 2 3 30 311 0 1 00 0 0 0 0 0X XXCSSCK

VLSISolutionyVS1053bVS1053B7. SPI BUSES7.7.3 SCI Operation in Middle of Two SDI Bytes01XCSSCKSI77 6 5 10 00 7 6 5 1 0SDI ByteSCI OperationSDI Byte8 9

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8 Functional Description8.1 Main FeaturesVS1053b is based on a proprietary digital signal processo

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.2.2 Supported MP1 (MPEG layer I) FormatsNote: Layer I / II decoding must be specifically enabled

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.2.5 Supported AAC (ISO/IEC 13818-7 and ISO/IEC 14496-3) FormatsVS1053b decodes MPEG2-AAC-LC-2.0.

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTIONAAC12:Samplerate / Hz Maximum Bitrate kbit/s - for 2 channels≤96 132 144 192 264 288 384 529 57648

VLSISolutionyVS1053bVS1053BCONTENTS7.4 Serial Protocol for Serial Data Interface (SDI) . . . . . . . . . . . . . . . . . . . . . . . 197.4.1 General .

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.2.6 Supported WMA FormatsWindows Media Audio codec versions 2, 7, 8, and 9 are supported. All WM

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.2.7 Supported RIFF WAV FormatsThe most common RIFF WAV subformats are supported, with 1 or 2 aud

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.2.8 Supported MIDI FormatsGeneral MIDI and SP-MIDI format 0 files are played. Format 1 and 2 files

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTIONVS1053b Melodic Instruments (GM1)1 Acoustic Grand Piano 33 Acoustic Bass 65 Soprano Sax 97 Rain (F

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.3 Data Flow of VS1053bVolumecontrolAudioFIFOS.rate.conv.and DACRBitstreamFIFOSDILSCI_VOLSM_ADPCM

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.4 EarSpeaker Spatial ProcessingWhile listening to headphones the sound has a tendency to be loca

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.5 Serial Data Interface (SDI)The serial data interface is meant for transferring compressed data

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.7 SCI RegistersVS1053b sets DREQ low when it detects an SCI operation (this delay is 16 to 40 CL

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.7.1 SCI MODE (RW)SCI MODE is used to control the operation of VS1053b and defaults to 0x0800 (SM

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTIONIf SM TESTS is set, SDI tests are allowed. For more details on SDI tests, look at Chapter 9.12.SM

VLSISolutionyVS1053bVS1053BCONTENTS8.2.7 Supported RIFF WAV Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . 318.2.8 Supported MIDI Forma

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.7.2 SCI STATUS (RW)SCI STATUS contains information on the current status of VS1053b. It also con

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.7.3 SCI BASS (RW)Name Bits DescriptionST AMPLITUDE 15:12 Treble Control in 1.5 dB steps (-8..7,

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.7.4 SCI CLOCKF (RW)The operation of SCI CLOCKF has changed slightly in VS1053b compared to VS100

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.7.5 SCI DECODE TIME (RW)When decoding correct data, current decoded time is shown in this regist

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTIONSM WRAMADDR Dest. addr. Bits/ DescriptionStart. . . End Start. . . End Word0x1800. . . 0x18XX 0x18

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.7.9 SCI HDAT0 and SCI HDAT1 (R)For WAV files, SCI HDAT1 contains 0x7665 (“ve”). SCI HDAT0 contain

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTIONWhen read, SCI HDAT0 and SCI HDAT1 contain header information that is extracted from MP3 streamcur

VLSISolutionyVS1053bVS1053B8. FUNCTIONAL DESCRIPTION8.7.11 SCI VOL (RW)SCI VOL is a volume control for the player hardware. The most significant byte o

VLSISolutionyVS1053bVS1053B9. OPERATION9 Operation9.1 ClockingVS1053b operates on a single, nominally 12.288 MHz fundamental frequency master clock. T

VLSISolutionyVS1053bVS1053B9. OPERATION9.4 Low Power ModeIf you need to keep the system running while not decoding data, but need to lower the power c

VLSISolutionyVS1053bVS1053BCONTENTS9.5 Play and Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 499.5.1 Playing a W

VLSISolutionyVS1053bVS1053B9. OPERATION9.5.2 Cancelling PlaybackCancelling playback of a song is a normal operation when the user wants to jump to ano

VLSISolutionyVS1053bVS1053B9. OPERATIONNote: It is recommended that playback volume is decreased by e.g. 10 dB when fast forwarding/rewinding.Note: Re

VLSISolutionyVS1053bVS1053B9. OPERATION9.6 Feeding PCM dataVS1053b can be used as a PCM decoder by sending a WAV file header. If the length sent in the

VLSISolutionyVS1053bVS1053B9. OPERATION9.8 ADPCM RecordingThis chapter explains how to create RIFF/WAV file with IMA ADPCM format. This is a widely sup

VLSISolutionyVS1053bVS1053B9. OPERATIONWriteVS10xxPatch() should perform the following SCI writes (only for VS1053b):Register Reg. No ValueSCI WRAMADD

VLSISolutionyVS1053bVS1053B9. OPERATION9.8.3 Adding a RIFF HeaderTo make your IMA ADPCM file a RIFF / WAV file, you have to add a header before the actu

VLSISolutionyVS1053bVS1053B9. OPERATION9.8.4 Playing ADPCM DataIn order to play back your IMA ADPCM recordings, you have to have a file with a header a

VLSISolutionyVS1053bVS1053B9. OPERATION9.9 SPI BootIf GPIO0 is set with a pull-up resistor to 1 at boot time, VS1053b tries to boot from external SPI

VLSISolutionyVS1053bVS1053B9. OPERATION9.11 Extra ParametersThe following structure is in X memory at address 0x1e00 (note the different location than

VLSISolutionyVS1053bVS1053B9. OPERATIONYou can see that in the invalid read the low part wraps from 0x0000 to 0xffff while the high part stays thesame

VLSISolutionyVS1053bVS1053BCONTENTS9.12.2 Pin Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 639.12.3 SCI Test . .

VLSISolutionyVS1053bVS1053B9. OPERATIONpositionMsec is a field that gives the current play position in a file in milliseconds, regardless ofrewind and f

VLSISolutionyVS1053bVS1053B9. OPERATION9.11.3 AACParameter Address Usageconfig1 0x1e03(7:4) SBR and PS selectsceFoundMask 0x1e2a Single channel element

VLSISolutionyVS1053bVS1053B9. OPERATIONconfig1(7:6) Usage’00’ normal mode, process PS if it is available’01’ process PS if it is available, but in down

VLSISolutionyVS1053bVS1053B9. OPERATIONGain Volume SCI VOL (Volume-Gain)-11 (-5.5 dB) 0 (+0.0 dB) 0x0b0b (-5.5 dB)-11 (-5.5 dB) 3 (-1.5 dB) 0x0e0e (-7

VLSISolutionyVS1053bVS1053B9. OPERATION9.12.3 SCI TestSci test is initialized with the 8-byte sequence 0x53 0x70 0xEE n 0 0 0 0, where n − 48 is the r

VLSISolutionyVS1053bVS1053B9. OPERATIONLSb’s of the SCI AICTRLn should be zero. The resulting frequencies Fsincan be calculated from theDAC samplerate

VLSISolutionyVS1053bVS1053B10. VS1053B REGISTERS10 VS1053b Registers10.1 Who Needs to Read This ChapterUser software is required when a user wishes to

VLSISolutionyVS1053bVS1053B10. VS1053B REGISTERS10.5 Serial Data RegistersSDI registers, prefix SERReg Type Reset Abbrev[bits] Description0xC011 r 0 DA

VLSISolutionyVS1053bVS1053B10. VS1053B REGISTERS10.8 Interrupt RegistersInterrupt registers, prefix INTReg Type Reset Abbrev[bits] Description0xC01A rw

VLSISolutionyVS1053bVS1053B10. VS1053B REGISTERS10.9 Watchdog v1.0 2002-08-26The watchdog consist of a watchdog counter and some logic. After reset, t

VLSISolutionyVS1053bVS1053BCONTENTS10.11.2 Configuration TIMER CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . 7310.11.3 Configuration TIMER

VLSISolutionyVS1053bVS1053B10. VS1053B REGISTERS10.10 UART v1.1 2004-10-09RS232 UART implements a serial interface using rs232 standard.StartbitD0D1 D

VLSISolutionyVS1053bVS1053B10. VS1053B REGISTERS10.10.3 Data UARTx DATAA read from UARTx DATA returns the received byte in bits 7:0, bits 15:8 are ret

VLSISolutionyVS1053bVS1053B10. VS1053B REGISTERS10.10.6 Interrupts and OperationTransmitter operates as follows: After an 8-bit word is written to the

VLSISolutionyVS1053bVS1053B10. VS1053B REGISTERS10.11 Timers v1.0 2002-04-23There are two 32-bit timers that can be initialized and enabled independen

VLSISolutionyVS1053bVS1053B10. VS1053B REGISTERS10.11.3 Configuration TIMER ENABLETIMER ENABLE BitsName Bits DescriptionTIMER EN T1 1 Enable timer 1TIM

VLSISolutionyVS1053bVS1053B10. VS1053B REGISTERS10.12 VS1053b Audio PathMIC AMPMUXStereo ADCMICNMICPLINE1LINE2Sample-RateConverterAudioFIFO+VolumeCont

VLSISolutionyVS1053bVS1053B10. VS1053B REGISTERS10.13 I2S DAC InterfaceThe I2S Interface makes it possible to attach an external DAC to the system.Not

VLSISolutionyVS1053bVS1053B11. VS1053 VERSION CHANGES11 VS1053 Version ChangesThis chapter describes the lastest and most important changes done to VS

VLSISolutionyVS1053bVS1053B11. VS1053 VERSION CHANGES• WMA,AAC: more robust resync.• WMA,AAC: If resync is performed, broadcast mode is automatically

VLSISolutionyVS1053bVS1053B12. DOCUMENT VERSION CHANGES12 Document Version ChangesThis chapter describes the most important changes to this document.V

VLSISolutionyVS1053bVS1053BLIST OF FIGURESList of Figures1 Pin Configuration, LQFP-48. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

VLSISolutionyVS1053bVS1053B13. CONTACT INFORMATION13 Contact InformationVLSI Solution OyEntrance G, 2nd floorHermiankatu 8FIN-33720 TampereFINLANDFax:

VLSISolutionyVS1053bVS1053B1. LICENSES1 LicensesMPEG Layer-3 audio decoding technology licensed from Fraunhofer IIS and Thomson.Note: If you enable La